1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device. More particularly, the present invention relates to a method for fabricating a low voltage coefficient capacitor.
2. Description of the Related Art
As the integration of an integrated circuit (IC) is increased by implementing deep sub-micron processes, the dimensions of all devices composing the IC are reduced. With the help of the reduction in the dimension of the devices, the operation speed of the devices can be increased.
The operation speed of a device is not only determined by the layout of an internal circuit density of the device, but is also affected by the material used for fabricating the device. The material used for fabricating the device plays an important role in increasing operation speed of the device when the integration of elements in an integrated circuit (IC) increases to approach deep sub-micron processes. For example, as logic devices approach to a 0.18-.mu.m process, copper conductive wires, instead of aluminum conductive wires, are used in a multi-level metallization process to increase the operation speed.
Furthermore, the distance between a capacitor and a transistor in a dynamic random access memory (DRAM) is reduced due to the improvement in the process technology. Therefore, transmission time (or operation time) between the capacitor and the transistor is decreased, that is, that the operation speed is increased.
Conventionally, a top electrode and a bottom electrode of a capacitor in a DRAM are made of polysilicon. Because the polysilicon has a higher voltage coefficient, the operation speed of the capacitor is limited. Therefore, the overall performance of a DRAM can barely keep up with the performance of any present main board or center process unit (CPU). As a result, the operation speed of DRAM becomes the bottleneck of a computer system.